Various example embodiments of the inventive concepts described herein relate to a calibration circuit, a calibration system, a semiconductor memory device including the same, and/or a method of using a calibration circuit, and more particularly, relate to a calibration circuit including a common node shared by a pull-up calibration path and a pull-down calibration path, a semiconductor memory device including the same, a system including the same, and/or a method of using the calibration circuit.
A signal transmitted along a transmission line may be reflected at the end of the transmission line. Additionally, the signal reflection may have an influence on the transmission of the signal. A termination resistor may be used to match the impedance between devices exchanging signals through the transmission line, and may reduce the signal reflection. For impedance matching, a termination resistor (i.e., on-die termination (ODT)) may be included within a memory device which receives a command and an address from a memory controller at high speed, and exchanges data with the memory controller at high speed.
A value of the termination resistor (e.g., resistance value) in the memory device may vary with a process, a voltage, and a temperature. For this reason, the memory device may include a calibration circuit for calibrating the value of the termination resistor. A conventional calibration circuit includes a pull-up calibration path and a pull-down calibration path separated from each other. In this case, the respective paths may be influenced by the PVT (process, voltage, temperature) variation.